sd:appendix_4_instruction_set_architecture
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| sd:appendix_4_instruction_set_architecture [2026/04/14 06:09] – external edit (Unknown date) 127.0.0.1 | sd:appendix_4_instruction_set_architecture [2026/04/23 04:14] (current) – appledog | ||
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| - | = Appendix 4 Instruction Set Architecture | + | [[ISA]] |
| - | + | ||
| - | === Load/Store Instructions | + | |
| - | ^ Byte ^ Code ^ Example ^ Description | | + | |
| - | | 00 | LD_IMM | + | |
| - | | 01 | LD_MEM | + | |
| - | | 02 | LD_REG | + | |
| - | | 03 | LD_REG24 | LDA [X:Y] | Load register from memory location using [low_byte: | + | |
| - | | 04 | LD_IMM24 | LDA [$1:$C000] | Load byte from memory location [bank:addr] | | + | |
| - | | 05 | ST_MEM | + | |
| - | | 06 | ST_REG | + | |
| - | | 07 | ST_REG24 | STA [X:Y] | Store A in memory using [low_byte: | + | |
| - | | 08 | ST_IMM24 | STA [$0: | + | |
| - | + | ||
| - | <codify armasm> | + | |
| - | ; ld/st example | + | |
| - | LDA $1234 ; Load immediate $1234 into A | + | |
| - | LDAL $42 ; Load immediate byte $42 into AL | + | |
| - | LDA [$F000] | + | |
| - | STA [2: | + | |
| - | STA [B:X] ; Store into bank BL, offset X. | + | |
| - | STA [BLX] ; Store into bank BL, offset X. | + | |
| - | </ | + | |
| - | + | ||
| - | ==== Assembly | + | |
| - | 00 LD_REG | + | |
| - | 00 A | + | |
| - | 01 02 $201 (little endian) | + | |
| - | + | ||
| - | === Data Movement Instructions of the Caribbean | + | |
| - | ^ Byte ^ Code ^ Example ^ Description | | + | |
| - | | 09 | MOV | MOV Y, A | Copy A up on Y | | + | |
| - | | 0A | XCHG | XCHG X, Y | Swap dem two -- X an Y trade place, quick quick | | + | |
| - | + | ||
| - | ==== Assembly | + | |
| - | 09 00 01 MOV A, B | + | |
| - | 0A 02 03 XCHG X, Y | + | |
| - | + | ||
| - | === Pirate Stack Operations | + | |
| - | ^ Byte ^ Code ^ Example ^ Description | | + | |
| - | | 0B | PUSH | PUSH A | Push A onto stack -- ye scurvy dog! | | + | |
| - | | 0C | POP | POP Y | Pull stack value an' hand it over to register | | + | |
| - | | 0D | PUSHA | PUSHA | Save all registers in ye treasure chest | | + | |
| - | | 0E | POPA | POPA | Get the registers back | | + | |
| - | | 0F | PUSHF | PUSHF | Push " | + | |
| - | | 10 | POPF | POPF | Pop " | + | |
| - | + | ||
| - | === Boring, Normal increment operations | + | |
| - | |= Byte |= Code |= Example | + | |
| - | | 15 | INC | INC X | Increment register by 1 (any size: byte/ | + | |
| - | | 16 | DEC | DEC Y | Decrement register by 1 (any size) | + | |
| - | + | ||
| - | === Arithmetic Operations | + | |
| - | | 1E | ADD | ADD X, Y | Add X = X + Y | | + | |
| - | | 1F | SUB | SUB X, Y | Subtract X = X - Y | | + | |
| - | | 20 | MUL | MUL X, Y | Multiply X:Y = X * Y \\ //(result may be 32-bit wide)// | | + | |
| - | | 21 | DIV | DIV X, Y | Divide X = X / Y **//and Y = X % Y (for free)//** | + | |
| - | | 22 | MOD | MOD X, Y | Modulo X = X % Y | + | |
| - | | 23 | ADD_REG_IMM | + | |
| - | | 24 | SUB_REG_IMM | + | |
| - | | 25 | MUL_REG_IMM | + | |
| - | | 26 | DIV_REG_IMM | + | |
| - | | 27 | MOD_REG_IMM | + | |
| - | | 28 | ADDC | ADDC X, Y | Add with carry; X = X + Y + carry flag | + | |
| - | | 29 | SUBC | SUBC X, Y | Subtract with borrow; X = X - Y - borrow | + | |
| - | | 30 | ADDC_REG_IMM | + | |
| - | | 31 | SUBC_REG_IMM | + | |
| - | + | ||
| - | + | ||
| - | === Logic Ops | + | |
| - | |= Byte |= Instruction |= Example |= Description |= Flags Affected | | + | |
| - | | 32 | AND | AND dst, src | Bitwise AND (compare two integers bit by bit) | | | + | |
| - | | 33 | OR | OR dst, src | Bitwise OR (same) | | | + | |
| - | | 34 | XOR | OR dst, src | Bitwise XOR | | | + | |
| - | | 35 | NOT | NOT reg | Invert all bits in an integer word | | | + | |
| - | | 36 | TEST | TEST dst, src | Non-destructive AND | | | + | |
| - | | 37 | AND_IMM | + | |
| - | | 38 | OR_IMM | + | |
| - | + | ||
| - | === Shift/ | + | |
| - | |= Byte |= Instruction |= Example |= Description |= Flags Affected | | + | |
| - | | 46 | SHL | SHL A | Shift left | Z, N, C | | + | |
| - | | 47 | SHR | SHR A | Shift right | Z, N, C | | + | |
| - | | 48 | SHLC | SHLC A | Shift left | Z, N, C | | + | |
| - | | 49 | SHRC | SHRC A | Shift right | Z, N, C | | + | |
| - | | 4A | ROL | ROL A | Rotate left | Z, N, C | | + | |
| - | | 4B | ROR | ROR A | Rotate right | Z, N, C | | + | |
| - | | 4C | ROLC | ROLC A | Rotate left | Z, N, C | | + | |
| - | | 4D | RORC | RORC A | Rotate right | Z, N, C | | + | |
| - | + | ||
| - | === Comparison & Branching | + | |
| - | |= Byte |= Instruction |= Example |= Description |= Flags Affected | | + | |
| - | | 5A | CMP | CMP A, B | Compare (subtract, discard result) | Z, N, C, V | | + | |
| - | | 5B | CMP_IMM | CMP A, 0x0001 | Compare (subtract, discard result) | Z, N, C, V | | + | |
| - | + | ||
| - | | | JMP | | Unconditional jump | None | | + | |
| - | | | JZ | | Jump if zero | None | | + | |
| - | | | JNZ | | Jump if not zero | None | | + | |
| - | | | JC | | Jump if carry set | None | | + | |
| - | | | JNC | | Jump if carry clear | None | | + | |
| - | + | ||
| - | === Subroutine Operations | + | |
| - | |= Byte |= Instruction |= Example |= Description |= Flags Affected | | + | |
| - | | | CALL | | Call subroutine (push IP, jump) | | | + | |
| - | | | RET | | Return from subroutine (pop IP) | | | + | |
| - | | | INT | | Software interrupt | | | + | |
| - | | | RTI | | Return from Interrupt | | | + | |
| - | + | ||
| - | === MMU/Block Operations | + | |
| - | | 8C | MEMCOPY | + | |
| - | | 8D | SCAN | SCAN H, N | Scan ptr H for needle N | | | + | |
| - | | 8E | CMPC3 | CMPC3 ELM, FLD, C | Compare Characters | Z C | | + | |
| - | | 8F | SKPC | SKPC ELM, AL | Skip characters | | | + | |
| - | | 90 | SKPC_IMM | SKPC ELM, $20 | Skip characters (immediate) | | | + | |
| - | + | ||
| - | These instructions are mainly inspired by instructions on the VAX architecture. | + | |
| - | + | ||
| - | * '' | + | |
| - | * '' | + | |
| - | * '' | + | |
| - | * '' | + | |
| - | + | ||
| - | The VAX was indeed ahead of it's time. This is not surprising as it was the most successful Super-Minicomputer of it's time. In the later microcomputer era, the 680x0 brought over a lot of functionality, | + | |
| - | + | ||
| - | === Bit Packing | + | |
| - | | 98 | PAB | PAB | Pack low 4 bytes of A and low 4 bytes of B into AL | | | + | |
| - | | 99 | UAB | UAB | Unpack AL into low 4 bytes of AL and low 4 bytes of BL | | | + | |
| - | + | ||
| - | + | ||
| - | === Flag Operations | + | |
| - | |= Byte |= Instruction |= Example |= Description |= Flags Affected | | + | |
| - | | A0 | SEZ | SEZ | Set zero flag | Z | | + | |
| - | | A1 | SEN | SEN | Set negative flag | N | | + | |
| - | | A2 | SEC | SEC | Set carry flag | C | | + | |
| - | | A3 | SEV | | Set overflow flag | V | | + | |
| - | | A4 | SEE | | Set Extra Flag (User flag) | E | | + | |
| - | | A5 | SEF | | Set Free Flag (User flag) | F | | + | |
| - | | A6 | SEB | | Set Bonus Flag (User flag) | B | | + | |
| - | | A7 | SEU | | Set User Flag (User flag) | U | | + | |
| - | | A8 | SED | | Set Debug Flag | D | | + | |
| - | | A9 | SEI | | Set Enable Interrupt | I | | + | |
| - | | AA | SSI | | Enable Sound System Interrupts | S | | + | |
| - | | AB | CLZ | | Clear zero flag | Z | | + | |
| - | | AC | CLN | | Clear negative flag | N | | + | |
| - | | AD | CLC | | Clear carry flag | C | | + | |
| - | | AE | CLV | | Clear overflow flag | V | | + | |
| - | | AF | CLE | CLE | Clear E | E | | + | |
| - | | B0 | CLF | CLF | Clear F Flag (user flag) | F | | + | |
| - | | B1 | CLB | + | |
| - | | B2 | CLU | + | |
| - | | B3 | CLD | + | |
| - | | B4 | CLI | CLI | Clear Interrupt Flag | I | | + | |
| - | | B5 | CSI | CSI | Clear Sound Interrupt | + | |
| - | | B6 | SETF | SETF 0x80 | Set bits in flags | * | | + | |
| - | | B7 | CLRF | CLRF 0x80 | Clear bits in flags | * | | + | |
| - | | B8 | TESTF | TESTF 0x80 | Non-destructive AND | Z C | | + | |
| - | + | ||
| - | === Other | + | |
| - | |= Instruction |= Description | | + | |
| - | | TSX | Transfer SP to register* | | + | |
| - | | TXS | Transfer register to SP* | | + | |
| - | + | ||
| - | * (*) these opcodes were suggested by stackminer from the Fantasy Console 2.0 discord. Thank you, stackminer! | + | |
| - | + | ||
| - | === System Operations | + | |
| - | |= Instruction |= Description | | + | |
| - | | YIELD | Poll UI, System Clock, Sound Chip, Video Chip, and others | | + | |
| - | | NOP | No operation | | + | |
| - | | HALT | Halt CPU (set H flag) | | + | |
sd/appendix_4_instruction_set_architecture.1776146946.txt.gz · Last modified: by 127.0.0.1
