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--- sd:history [2026/03/20 12:26] – appledog
+++ sd:history [2026/03/20 12:33] (current) – appledog
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 The SD-8516's legendary //single-cycle MUL// is not based on the latest technology, but technology from yesteryear. It uses a lookup table to perform an 8bit argument to 16 bit result MUL in a single CPU cycle.
-The //Quarter-square lookup// uses the formula xy = (x^2 + y^2 - (x-y)^2) / 2 in a squaring table of just 512 bytes. This allows it to do an 8x8 multiply with three lookups. One such implementation ran in 79 to 83 cycles on a 6502 -- much faster than shift-and-add. On a chip with an internal squaring ROM and a dedicated subtractor, this can be done in 3 to 4 cycles.
+The //Quarter-square lookup// uses the formula xy = ((x+y)^2 - (x-y)^2) / 4 in a squaring table of just 512 bytes. This allows it to do an 8x8 multiply with three lookups. One such implementation ran in 79 to 83 cycles on a 6502 -- much faster than shift-and-add. On a chip with an internal squaring ROM and a dedicated subtractor, this can be done in 3 to 4 cycles.
 But 3 to 4 cycles is nothing compared to one. //According to the lore,// Stellar Dynamics bet the bank and licensed a 128 KB mask ROM die from an unknown Japanese semiconductor partner. Hitachi, Toshiba, Sharp and many others were all doing custom ROM for game cartridges in that era. This ROM, bonded directly into the SD-8516 package, contains a complete 8 bit to 16 bit multiplication table. The MUL microcode concatenates the two 8-bit operands as a 16-bit ROM address and reads the 16-bit result in a single bus cycle. For partial products it then sums them with the internal ALU. A total of no more than 4 ROM lookups and 3 additions. Pipelined, an 8x8 mul into 16 bits could be done in //one CPU cycle.//