Differences

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--- sd:isa [2026/05/13 14:48] – appledog
+++ sd:isa [2026/06/10 04:36] (current) – appledog
@@ Line 38: / Line 38: @@
 | 67 | JC      | JC @label     | Jump if carry set   | None |
 | 68 | JNC     | JNC @label    | Jump if carry clear | None |
-| 84 | CALL    | CALL @label   | Call subroutine (push IP, jump) | |
+| 84 | [[#call|CALL]]    | CALL @label   | Call subroutine (push IP, jump) | |
 | 85 | RET     |               | Return from subroutine (pop IP) | |
 | 86 | INT     | INT 0x10      | Software interrupt | |
@@ Line 193: / Line 193: @@
 == Dictionary
 here you will find information about each opcode.
+<wrap #call /><wrap #call /><wrap #callr /><wrap #callr />
+**''CALL addr / CALL reg / CALLR reg''**\\ CALL pushes the return address of the next instruction and jumps to the location.
+The CALLR instruction takes a register operand and dispatches based on the register's size: 16-bit registers use the current bank combined with a 16-bit address, 8-bit registers work similarly, and 24-bit registers provide a full 24-bit address. For function pointers stored in 32-bit register pairs like AB, CALLR will convert the address to 24 bits by discarding the high byte.
 <wrap #sez /><wrap #sen /><wrap #sec /><wrap #sev />
@@ Line 269: / Line 274: @@
 <wrap #case />
 **''#200 $C8 CASE selector, #limit''**\\ switch-case. Index an address from selector and CALL to it. Limit is an immediate value (0-255) that represents the length of the table. If selector > limit it will silently fall-through (not CALL). If you need to detect whether or not the CALL occurred it is suggested that the handlers produce an error code (the 'default' of which is that no handler was called). Table format: [addr][addr][addr]...
+CASE is unusual because it reads from the instruction stream as data. The inline jump table isn't fetched and decoded, it's just structured bytes. This is the same pattern as LD_IMM (where the operand is fetched), but pushed further: an opcode-controlled variable-size payload. The bookkeeping all comes down to two derived addresses:
+* IP + 3 * sel: the table slot containing the jump target. Read with read_24bit.
+* IP + 3 * lim + 3: the first byte after the table. Used as the return point (and as the IP destination on OOB).
+Both are masked to 24 bits because IP arithmetic in a 24-bit address space wraps.
+OOB sets two flags and falls through (doesn't trap). VAX-style CASE would raise an exception. SC-8516's CASE sets V and ER but lets execution continue at the post-table point. That's a different policy -- error recoverable -- software decides whether to handle the case. If the caller wants trap-on-OOB behavior, it's a follow-up JV some_handler after the CASE.
+Flags otherwise untouched. CASE only writes V and ER. Z, N, C, etc. survive across the instruction, which is convenient if the selector was computed by an arithmetic op whose flags you still want.
+Note: A single entry CASE can be used as a CALLZ. CALL if register is zero, otherwise not.
 <wrap #case3 />